Micro-blind and buried vias for ultra-fine circuitry
Maximizes space savings and functional density
Enables better signal integrity with shorter interconnections
Supports higher layer counts in thinner, lighter board structures
Used in smartphones, tablets and wearable electronics
Feature | Technical specification |
Number of layers | 4 – 24 layers standard, 40 layers advanced, 60 layers prototype |
HDI Builds | 3+N+3, 4+N+4, any layer in R&D |
PCB thickness | 0.40 mm – 6.0 mm |
Copper weights (finished) | 0.5 OZ – 6 OZ |
Materials | High performance FR4, halogen-free FR4, Rogers |
Maxmimum dimensions | 546 mm x 662 mm |
Minimum track and gap | 0.075 mm / 0.075 mm |
Minimum mechanical drill | 0.15 mm |
Surface finishes available | HASL (SnPb), LF HASL (SnNiCu), OSP, ENIG, Immersion Tin, Immersion Silver, Electrolytic gold, Gold fingers |
Minimun laser drill | 0.10mm standard, 0.075mm advance |
Special Processes | Blind/Buried Vias, Via-in-pad, Backdrill, Sideplating,Countersunk Holes |
Engineering Support
Prototyping Services
Fast Turnaround
Seamless Transition to Mass Production
Customer support